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| features pxo (quarzoszillatoren) - high reliability for low cost - frequency stability to +-25 ppm - available in 5.0 and 3.3 volt - standard dip 14 and dip 8 package - excellent clock signal generator for dsp's and cpu's series cxof CXOH package 14 pin dip 8 pin dip frequency stability operating temperature range standard option rise and fall time "0" level "1" level "0" level "1" level "0" level "1" level "0" level "1" level ttl cmos standard option part numbering system example series cxof or CXOH blank for 5 volt 3 for 3.3 volt blank for 40/60% s for 45/55% pin 1 blank for no e/d enable/disable e for e/d blank for 100 ppm any 50 ~ 15 ppm blank for 0/+70c n = -10/+60c m = -20/+70c w = -40/+85c 4.0 ~ 32.0 mhz = 30 ma max. 32.0 ~ 80.0 mhz = 45 ma max. +-25 ~ +-100 ppm 1 ~ 10 ttl 15 ~ 50 pf without enable/disable function with enable/disable function pin 1 symmetry input voltage other parameters are available on request / create here your specification CXOH-3-s-e-50-w-27.000mhz petermann-technik | amselweg 8 | d-86916 kaufering fon: 00 49 (0) 81 91 / 30 53 95 | fax: 00 49 (0) 81 91 / 30 53 97 http://www.petermann-technik.de | info@petermann-technik.de frequency stability temperature range - extended temperature range to -40/+85c voltage current input +5.0 vdc +-10% +3.3 vdc +-10% 0/+70c ~ -40/+85c frequency range 1.0 ~ 80.0 mhz 1 ~ 4.0 mhz = 10 ma max. 0.4 v (10% vdd) +4.5 v (90%vdd) symmetry ttl 5 volt cmos 5 volt 40/60% 45/55% 5 ns typical / 10 ns max. load output ttl 3.3 volt 0.4 v max. +1.4 v min. cmos 3.3 volt 0.1 v (10% vdd) +2.97 v (90%vdd) 0.4 v max. +2.4 v min. petermann technik time & frequency components
petermann technik time & frequency components petermann-technik | amselweg 8 | d-86916 kaufering fon: 00 49 (0) 81 91 / 30 53 95 | fax: 00 49 (0) 81 91 / 30 53 97 http://www.petermann-technik.de | info@petermann-technik.de outline drawing of dip 14 package 0 . 8 4-00.55max 6 . 8 m a x 5 . 3 m a x #1 #7(grounded to the case) #14 #8 15.24 7 . 6 2 13.1max 20.4max connection pin #1 #7 #8 #14 nc/control gnd output v dd unit:mm test circuit for cmos (cmos load) v dd 0.01~0.1f gnd 1(1) oe gnd 14(8) 8(5) 7(4) v dd out cl=50pf test point cmos output wave form (cmos load) tr tf th t v ol duty=th/t v oh 90%v dd 50%v dd 10%v dd outline drawing of dip 8 package #1 #4(grounded to the case) #5 #8 7.62 7 . 6 2 12 .9max 12.9max connection pin #1 #4 #5 #8 nc/control gnd output v dd 0 . 8 4-00.55max 6 . 8 m a x 5 . 3 m a x unit:mm test circuit for ttl (ttl load) v dd 0.01~0.1f gnd d1~d4:in4148 1(1) oe gnd 14(8) 8(5) 7(4) v dd out d2 d3 d4 cl=15pf test point 390 ttl output wave form (ttl load) tr tf th t v ol duty=th/t v oh 2.4v 1.4v 0.4v |
Price & Availability of CXOH
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